4-bit CPU Simulator

Toy 4-bit CPU: two 4-bit data registers A and B, a 4-bit program counter PC, 16 memory instruction slots, flags, and visual 4-bit register LEDs.

Program

Each non-empty, non-comment instruction line becomes the next memory slot 0–15. Comments begin with ; or #. Immediates and jump targets are decimal 0–15; hex like 0xA is accepted.
120 ms
Ready.
CPU design and instruction set
  • Data registers: A, B — 4 bits each.
  • Program counter: PC — 4 bits, memory slots 0–15.
  • Flags: Z zero, C carry/borrow, N negative/high bit, O signed overflow for ADD/SUB/CMP.
  • LOAD/MOV/SWAP/NOP preserve flags unless specified.
  • Instructions:
    NOP, HLT, LOAD dst,value, LOAD dst,reg, ADD dst,src, SUB dst,src, AND dst,src, OR dst,src, XOR dst,src, NOT dst, SHL dst, SHR dst, SWAP, CMP reg,src, JMP target, JZ target, JNZ target.

CPU State

A register 0x0
0b0000
B register 0x0
0b0000
PC 0x0
0b0000
Z zero0
C carry0
N neg0
O over0
CPU cycles: 0

Current instruction / last ALU operation

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16-slot instruction memory

PC Instruction

Execution log / self-tests

Self-tests run a separate simulated CPU and do not disturb the visible program state.